1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically, to a semiconductor device including output circuits that output voltage signals for driving loads.
2. Description of the Related Art
Currently, active-matrix liquid crystal displays, organic EL displays, and the like have spread into the mainstream of display devices. Such a display device is equipped with a display panel having a matrix of display cells connected to a plurality of data lines, and a data driver for driving the data lines of the display panel.
Due to increases in the size and resolution of the display panel in recent years, the data driver has to drive increased load capacitances of the data lines of the display panel, and therefore tends to drive the data lines in a short driving period per pixel. The data driver amplifies input signals by charging or discharging the load capacitances of the data lines in accordance with the input signals corresponding to brightness levels represented by a video signal, and supplies the amplified input signals as output signals to the data lines.
Accordingly, an increase in the load capacitances of the data lines and a reduction in the driving period may prevent the amplification operation from following a level change of the input video signal, and cause a delay in the output signals. This may cause deterioration in image quality, such as display unevenness.
Thus, in order to prevent such a malfunction, a data driver in which an amplification accelerator circuit is added to a differential amplifier of an output circuit has been proposed (for example, Japanese Patent Application Laid-Open No. 2014-078804).
The amplification accelerator circuit forcefully increases or decreases the gate potential of each of P-channel and N-channel transistors of an output amplifier stage of the differential amplifier, on the basis of a magnitude comparison result between the average voltage of input signals corresponding to each of a plurality of data lines and the voltage of an output signal actually outputted to the single data line. Therefore, it is possible to reduce time required for a charging and discharging process, thus allowing an increase in an amplification speed of the input signals and an obtainment of the output signal that follows a level change of the input signals.
In the above-described amplification accelerator circuit, a current that corresponds to the difference between the average voltage of the plurality of input signals and the voltage of the output signal is added to a current of an input portion of a current mirror, which constitutes a load circuit of a differential stage of the above-described differential amplifier, in order to vary the gate potential of each of the P-channel and N-channel transistors of the output amplifier stage, so that the current flows through the current mirror circuit into a line connected to the gate of the transistor. However, in a configuration of the differential amplifier having a highly accurate output voltage, the current mirror constituting the load circuit of the differential stage of the differential amplifier is preferably designed so as to have a narrow channel width relative to a channel length, in order to obtain a mirror current with high accuracy. In this case, a response characteristic to variations in the mirror current deteriorates. Therefore, the configuration in which the input portion of the current mirror receives the current of the amplification accelerator circuit causes an increase in time between a level change of the input signals and a reflection of the level change on the gate potential. This impairs a significant increase in the amplification speed, thus causing deterioration in display quality.